Hello!
I’m interested in getting PPS output (RS232 level, but I can do level shifting if necessary) from icE1usb.
I’m aware there is a trace between GPS module and FPGA and I could add a bodge there to get the signal, but I’m interested in having it available without hardware modifications. Is this possible to implement using the current hardware or is there even already sw support for it which I didn’t already notice?
I guess it hasn’t been something that was originally intended to do, given that virtually every GPS receiver has a PPS output, I’d assume people usually already have some kind of setup for that independent of an icE1usb.
The icE1usb was not intended as a general-purpose GPS receiver or as a GPS-disciplined general-purpose clock reference. It just includes whatever is needed for its purpose internally.
Unlike @tnt I was not involved in the FPGA gateware of icE1usb. But in general it should be possible with a minor gateware change to route the 1PPS “wire” inside the FPGA to any of the spare I/Os, such as those exposed on the daughterboard connector.
Well define “without hardware modifications” 
There is just no free, externally accessible pins to output it from by default.
Some options would be :
And then some trivial gateware mod to put the PPS on the appropriate pin.
Thanks for all the info!
Well, what I meant by “without hardware modifications” was more like “without bodges”. Having a jumper between 2.54mm header pins is totally fine.
Even though I’ve been on software industry for over a decade now, I have to admit I’m total newbie in Verilog so this time I’m probably just using a bodge to expose the pin.
I’d like to file in a feature request but Redmine email verification doesn’t work for me at the moment (I didn’t receive any emails after account creation) so I’m filing the feature request here:
Please add GPS PPS signal available to any pin in the 2.54mm pitch GPIO header.